STM32 Blue Pill Drivers
Drivers that could be used to interface and interact with STM32F103C8T6 Microcontroller
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t_RCC_BDCR Struct Reference

RCC Backup domain control register. More...

#include "MCAL/RCC/RCC_private.h"

+ Collaboration diagram for t_RCC_BDCR:

Data Fields

t_u32 LSEON: 1
 External Low Speed oscillator enable. More...
 
t_u32 LSERDY: 1
 External Low Speed oscillator ready. More...
 
t_u32 LSEBYP: 1
 External Low Speed oscillator bypass. More...
 
t_u32 __pad0__: 5
 Reserved bit(s) More...
 
t_u32 RTCSEL: 2
 RTC clock source selection. More...
 
t_u32 __pad1__: 5
 Reserved bit(s) More...
 
t_u32 RTCEN: 1
 RTC clock enable. More...
 
t_u32 BDRST: 1
 Backup domain software reset. More...
 
t_u32 __pad2__: 15
 Reserved bit(s) More...
 

Detailed Description

RCC Backup domain control register.

Field Documentation

◆ LSEON

t_u32 LSEON

External Low Speed oscillator enable.

This field enables the external Low Speed oscillator (LSE)

◆ LSERDY

t_u32 LSERDY

External Low Speed oscillator ready.

This field is set and cleared by hardware to indicate when the external Low Speed oscillator (LSE) is stable.

Warning
This field is read-only

◆ LSEBYP

t_u32 LSEBYP

External Low Speed oscillator bypass.

This field is used to bypass the oscillator with an external clock.

◆ __pad0__

t_u32 __pad0__

Reserved bit(s)

Attention
This field is reserved and must be kept at reset value.

◆ RTCSEL

t_u32 RTCSEL

RTC clock source selection.

This field selects the clock source to be used for the RTC.

◆ __pad1__

t_u32 __pad1__

Reserved bit(s)

Attention
This field is reserved and must be kept at reset value.

◆ RTCEN

t_u32 RTCEN

RTC clock enable.

This field enables the RTC clock

◆ BDRST

t_u32 BDRST

Backup domain software reset.

This field forces the Backup domain to reset.

◆ __pad2__

t_u32 __pad2__

Reserved bit(s)

Attention
This field is reserved and must be kept at reset value.

The documentation for this struct was generated from the following file: