STM32 Blue Pill Drivers
Drivers that could be used to interface and interact with STM32F103C8T6 Microcontroller
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t_RCC_APB2RSTR Struct Reference

RCC APB2 peripheral reset register. More...

#include "MCAL/RCC/RCC_private.h"

+ Collaboration diagram for t_RCC_APB2RSTR:

Data Fields

t_u32 AFIORST: 1
 Alternate function I/O reset. More...
 
t_u32 __pad0__: 1
 Reserved bit(s) More...
 
t_u32 IOPARST: 1
 IO port A reset. More...
 
t_u32 IOPBRST: 1
 IO port B reset. More...
 
t_u32 IOPCRST: 1
 IO port C reset. More...
 
t_u32 IOPDRST: 1
 IO port D reset. More...
 
t_u32 IOPERST: 1
 IO port E reset. More...
 
t_u32 IOPFRST: 1
 IO port F reset. More...
 
t_u32 IOPGRST: 1
 IO port G reset. More...
 
t_u32 ADC1RST: 1
 ADC 1 interface reset. More...
 
t_u32 ADC2RST: 1
 ADC 2 interface reset. More...
 
t_u32 TIM1RST: 1
 TIM1 timer reset. More...
 
t_u32 SPI1RST: 1
 SPI 1 reset. More...
 
t_u32 __pad1__: 1
 Reserved bit(s) More...
 
t_u32 USART1RST: 1
 USART1 reset. More...
 
t_u32 ADC3RST: 1
 ADC 3 interface reset. More...
 
t_u32 __pad2__: 16
 Reserved bit(s) More...
 

Detailed Description

RCC APB2 peripheral reset register.

Field Documentation

◆ AFIORST

t_u32 AFIORST

Alternate function I/O reset.

This field resets the IO port configuration registers

◆ __pad0__

t_u32 __pad0__

Reserved bit(s)

Attention
This field is reserved and must be kept at reset value.

◆ IOPARST

t_u32 IOPARST

IO port A reset.

This field resets the IO port A configuration registers

◆ IOPBRST

t_u32 IOPBRST

IO port B reset.

This field resets the IO port B configuration registers

◆ IOPCRST

t_u32 IOPCRST

IO port C reset.

This field resets the IO port C configuration registers

◆ IOPDRST

t_u32 IOPDRST

IO port D reset.

This field resets the IO port D configuration registers

◆ IOPERST

t_u32 IOPERST

IO port E reset.

This field resets the IO port E configuration registers

◆ IOPFRST

t_u32 IOPFRST

IO port F reset.

This field resets the IO port F configuration registers

◆ IOPGRST

t_u32 IOPGRST

IO port G reset.

This field resets the IO port G configuration registers

◆ ADC1RST

t_u32 ADC1RST

ADC 1 interface reset.

This field resets the ADC 1 configuration registers

◆ ADC2RST

t_u32 ADC2RST

ADC 2 interface reset.

This field resets the ADC 2 configuration registers

◆ TIM1RST

t_u32 TIM1RST

TIM1 timer reset.

This field resets the TIM1 configuration registers

◆ SPI1RST

t_u32 SPI1RST

SPI 1 reset.

This field resets the SPI 1 configuration registers

◆ __pad1__

t_u32 __pad1__

Reserved bit(s)

Attention
This field is reserved and must be kept at reset value.

◆ USART1RST

t_u32 USART1RST

USART1 reset.

This field resets the USART1 configuration registers

◆ ADC3RST

t_u32 ADC3RST

ADC 3 interface reset.

This field resets the ADC 3 configuration registers

◆ __pad2__

t_u32 __pad2__

Reserved bit(s)

Attention
This field is reserved and must be kept at reset value.

The documentation for this struct was generated from the following file: