STM32 Blue Pill Drivers
Drivers that could be used to interface and interact with STM32F103C8T6 Microcontroller
|
RCC clock interrupt register. More...
#include "MCAL/RCC/RCC_private.h"
Data Fields | |
t_u32 | LSIRDYF: 1 |
LSI ready interrupt flag. More... | |
t_u32 | LSERDYF: 1 |
LSE ready interrupt flag. More... | |
t_u32 | HSIRDYF: 1 |
HSI ready interrupt flag. More... | |
t_u32 | HSERDYF: 1 |
HSE ready interrupt flag. More... | |
t_u32 | PLLRDYF: 1 |
PLL ready interrupt flag. More... | |
t_u32 | __pad0__: 2 |
Reserved bit(s) More... | |
t_u32 | CSSF: 1 |
Clock security system interrupt flag. More... | |
t_u32 | LSIRDYIE: 1 |
LSI ready interrupt enable. More... | |
t_u32 | LSERDYIE: 1 |
LSE ready interrupt enable. More... | |
t_u32 | HSIRDYIE: 1 |
HSI ready interrupt enable. More... | |
t_u32 | HSERDYIE: 1 |
HSE ready interrupt enable. More... | |
t_u32 | PLLRDYIE: 1 |
PLL ready interrupt enable. More... | |
t_u32 | __pad1__: 3 |
Reserved bit(s) More... | |
t_u32 | LSIRDYC: 1 |
LSI ready interrupt clear. More... | |
t_u32 | LSERDYC: 1 |
LSE ready interrupt clear. More... | |
t_u32 | HSIRDYC: 1 |
HSI ready interrupt clear. More... | |
t_u32 | HSERDYC: 1 |
HSE ready interrupt clear. More... | |
t_u32 | PLLRDYC: 1 |
PLL ready interrupt clear. More... | |
t_u32 | __pad2__: 2 |
Reserved bit(s) More... | |
t_u32 | CSSC: 1 |
Clock security system interrupt clear. More... | |
t_u32 | __pad3__: 8 |
Reserved bit(s) More... | |
RCC clock interrupt register.
t_u32 LSIRDYF |
LSI ready interrupt flag.
This field indicates whether the LSI oscillator is stable or not
t_u32 LSERDYF |
LSE ready interrupt flag.
This field indicates whether the LSE oscillator is stable or not
t_u32 HSIRDYF |
HSI ready interrupt flag.
This field indicates whether the HSI oscillator is stable or not
t_u32 HSERDYF |
HSE ready interrupt flag.
This field indicates whether the HSE oscillator is stable or not
t_u32 PLLRDYF |
PLL ready interrupt flag.
This field indicates whether the PLL oscillator is stable or not
t_u32 __pad0__ |
Reserved bit(s)
t_u32 CSSF |
Clock security system interrupt flag.
This field indicates whether a failure is detected on the external 3.3 V oscillator
t_u32 LSIRDYIE |
LSI ready interrupt enable.
This field enables the LSI ready interrupt
t_u32 LSERDYIE |
LSE ready interrupt enable.
This field enables the LSE ready interrupt
t_u32 HSIRDYIE |
HSI ready interrupt enable.
This field enables the HSI ready interrupt
t_u32 HSERDYIE |
HSE ready interrupt enable.
This field enables the HSE ready interrupt
t_u32 PLLRDYIE |
PLL ready interrupt enable.
This field enables the PLL ready interrupt
t_u32 __pad1__ |
Reserved bit(s)
t_u32 LSIRDYC |
LSI ready interrupt clear.
This field clears the LSI ready interrupt
t_u32 LSERDYC |
LSE ready interrupt clear.
This field clears the LSE ready interrupt
t_u32 HSIRDYC |
HSI ready interrupt clear.
This field clears the HSI ready interrupt
t_u32 HSERDYC |
HSE ready interrupt clear.
This field clears the HSE ready interrupt
t_u32 PLLRDYC |
PLL ready interrupt clear.
This field clears the PLL ready interrupt
t_u32 __pad2__ |
Reserved bit(s)
t_u32 CSSC |
Clock security system interrupt clear.
This field clears the clock security system interrupt
t_u32 __pad3__ |
Reserved bit(s)